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83 IP
51
0.118
Input 2MHz~16MHz, output 16~1000MHz, 1.08~1.32V small-size PLL; UMC 55nm Eflash Process.
Input 2MHz~16MHz, output 16~1000MHz, 1.08~1.32V small-size PLL; UMC 55nm Eflash Process....
52
0.118
Input 400M-1600MHz, output 400M-1600MHz, all digital slave delay line of FXADDLL340HH0L to generate 25% delay in period of FREF, UMC 40nm LP/RVT Logic Process.
Input 400M-1600MHz, output 400M-1600MHz, all digital slave delay line of FXADDLL340HH0L to generate 25% delay in period of FREF, UMC 40nm LP/RVT Logic...
53
0.118
Input 5M-35MHz, output 5M-35MHz. An all digital slave delay line of FXADDLL070HH0L to generate pulse-width tunabble clock in period of FREF ; UMC 40nm LP Process
Input 5M-35MHz, output 5M-35MHz. An all digital slave delay line of FXADDLL070HH0L to generate pulse-width tunabble clock in period of FREF ; UMC 40nm...
54
0.118
Input 80MHz-440MHz, DQS delay 1/32 and 1/16 of FREF period, UMC 40nm LP/RVT Low-K logic process.
Input 80MHz-440MHz, DQS delay 1/32 and 1/16 of FREF period, UMC 40nm LP/RVT Low-K logic process....
55
0.118
Internal-R, frequency 48MHz/8MHz. Input 1.08V-1.32V; UMC 55nm EFLASH process
Internal-R, frequency 48MHz/8MHz. Input 1.08V-1.32V; UMC 55nm EFLASH process...
56
0.118
NO External-R ,frequency 30K~60K ,RC Oscillator . Power:2.0V~3.6V; UMC 55nm EFLASH process. _x005F_x005F_x005F_x000D_
NO External-R ,frequency 30K~60K ,RC Oscillator . Power:2.0V~3.6V; UMC 55nm EFLASH process....
57
0.118
IP name: FXS2D101HH0L Area: 300um*300um
IP name: FXS2D101HH0L Area: 300um*300um...
58
0.0
1 to 20 MHz Phase-frequency detector and charge pump
Phase-frequency detector (PFD) forms a control signal for VCO tuning. PFD compares phases of a divided VCO signal and a divided reference oscillator s...
59
0.0
32KHz input frequency Synthesizer PLL
The MXL-PLL-SYN-LIF-DC is a high performance PLL based frequency synthesizer implemented using digital CMOS technology. It is highly integrated and re...
60
0.0
14GHz Integer-N High-Speed PLL
1-VIA’s broad portfolio of general-purpose and optimized LC-PLLs offer a wide range of clocking solutions. The Integer-N high-speed PLL creates qua...
61
0.0
24GHz VCO in SiGe
The PMCC_VCO20G /24G /25G /26G /30G is a set of fully differential high speed VCOs covering 20GHz … 30GHz frequency range, designed using Jazz SiGe120...
62
0.0
Very Low Area Fractional-N Frequency Synthesizer PLL
Widely programmable High Bandwidth Fractional-N delta sigma frequency synthesizer. Ultra low-area with excellent jitter performance....
63
0.0
PLL CMOS phase-frequency detector with CMOS charge pump
Phase-frequency detector (PFD) forms control signal for VCO tuning. PFD compares phases of divided VCO signal and divided reference oscillator signal ...
64
0.0
PLL CMOS phase-frequency detector with ECL charge pump
Phase-frequency detector (PFD) forms control signal for VCO tuning. PFD compares phases of divided VCO signal and divided reference oscillator signal ...
65
0.0
PLL ECL phase-frequency detector with ECL charge pump
Phase-frequency detector (PFD) forms control signal for VCO tuning. PFD compares phases of divided VCO signal and divided reference oscillator signal ...
66
0.0
PLL ECL phase-frequency detector with ECL charge pump
Phase-frequency detector (PFD) forms control signal for VCO tuning. PFD compares phases of divided VCO signal and divided reference oscillator signal ...
67
0.0
Clock Delay Monitor IP
Synopsys’ Clock and Delay Monitor (CDM) is a small IP capable of performing on-chip measurements, monitoring, and safety operations. It can be embedde...
68
0.0
1MHz to 50MHz Fractional-N LC Phase-Locked Loop
055TSMC_PLL_03 is a PLL frequency synthesizer that generates two clock signals in the range from 1 MHz to 50MHz. The synthesizer consists of one volta...
69
0.0
1MHz-50GHz Programmable Prescaler - Divider by 1/2/4/8/16 in SiGe
The PMCC_DIV50G1_16 is a high speed (up to 50GHz) fully differential programmable divider IP block, designed using Jazz SiGe120 (SBC18HX) technology. ...
70
0.0
CMOP charge pump
Charge pump (CP) is a switched current sources controlled by phase-frequency detector which injects or removes some charge to increase or decrease VCO...
71
0.0
Integer-N-PLL-based HF Frequency Synthesizer and Clock Generator with integrated Loop Filter and VCO
The TS_FS_9M70_X8 synthesizes 3.3V-square-wave FVCO frequencies within the HF range from 2.424MHz up to 9.697MHz, by steps of 18.9393kHz, and provides...
72
0.0
Low Jitter PLL with Accurately Spaced 16-Phase Output Clocks
High bandwidth PLL with accurately spaced 16-phase output clocks. Low Power/ Low Area hard macro with industry leading jitter performance for its po...
73
0.0
Spread Spectrum PLL
The MXL-PLL-SS-R is a high performance PLL based Spread Spectrum Clock Generator implemented using a digital CMOS technology. It is highly integrated...
74
0.0
Frequency Synthesizer PLL
The MXL-PLL-SYN is a high performance PLL based frequency synthesizer implemented using a digital CMOS technology. It is highly integrated and require...
75
0.0
Programmable 6-bit CMOS frequency divider
The programmable 6-bit CMOS frequency divider is a set of two independent circuits. One of them is designed using 6-bit counter and is able to change ...
76
0.0
Programmable 9-bit CMOS frequency divider (2…511 dividing ratio)
The programmable CMOS frequency divider is a set of 8 serially connected dividers with the varied dividing ratio 2/3. This structure is especially eff...
77
0.0
Programmable 9-bit CMOS low-frequency divider (5...511 dividing ratio)
The programmable CMOS low-frequency divider design is based on the 9-bit counter. Since this structure consists of the static triggers, current consum...
78
0.0
Programmable CMOS frequency divider (32...16383 dividing ratio)
The programmable CMOS frequency divider is a set of serially connected dividers with the varied dividing ratio 2/3. This structure is especially effec...
79
0.0
Programmable CMOS frequency divider (56..16383 dividing ratio)
The cell is 14-bit programmable frequency divider. It consists of CMOS prescaler with variable dividing ratio 8/9 controlled by 3-bit swallow counter ...
80
0.0
Programmable CMOS HF divider (16…4095 dividing ratio)
The programmable CMOS frequency divider consists of two independent circuits. The first one a set of 8 serially connected dividers with the varied div...
81
0.0
Programmable frequency divider (56 to 16383 dividing ratio)
The cell is 14-bit programmable frequency divider. It consists of ECL prescaler with variable dividing ratio 8/9 controlled by 3-bit swallow counter a...
82
0.0
TSMC 12 FFC PLL_Clock Generator / Clock Synthersizer (Fractional / Integer, 4GHz)
The ARKT12FFC_CGPLL4G PLL is a versatile and stable general-purpose frequency synthesizer with phase synchronization(de-skew) Phase-Locked Loop (PLL)...
83
0.0
TSMC 12 FFC PLL_Clock Generator / Clock Synthersizer (Fractional / Integer, 8GHz)
The ARKT12FFC_CGPLL8G PLL is a versatile and stable general-purpose frequency synthesizer with phase synchronization(de-skew) Phase-Locked Loop (PLL)...
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